Stress-free silicon wafer and a die or chip made therefrom

Details Stress-free silicon wafer and a die or chip made therefrom Stress-free silicon wafer and a die or chip made therefrom

1998-03-26

2000-04-25

Monin, Jr., Donald L.

Semiconductor device manufacturing: process

Bonding of plural semiconductor substrates

Thinning of semiconductor substrate

438959, 438977, 257679, H01L 2170

Patent

active

060543728

ABSTRACT:
A stress-free wafer comprising a substrate formed of a semiconductor material having front side and back side planar and parallel surfaces and having a thickness ranging from 2 to 7 mils. The front side has electronic circuitry therein with exposed contact pads. The back side is ground and polished so that the wafer is substantially stress free and can withstand bending over a 2" radius without breaking or damaging.

REFERENCES:
patent: 5151378 (1992-09-01), Ramde
patent: 5227339 (1993-07-01), Kishii
patent: 5412192 (1995-05-01), Hoss
patent: 5480842 (1996-01-01), Clifton et al.
patent: 5544014 (1996-08-01), Atsumi
patent: 5571740 (1996-11-01), Peterson

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