Stress engineering using dual pad nitride with selective SOI...

Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – With lattice constant mismatch

Reexamination Certificate

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C257S347000, C257SE29193, C438S149000, C438S479000, C438S517000

Reexamination Certificate

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11162953

ABSTRACT:
A method for engineering stress in the channels of MOS transistors of different conductivity using highly stressed nitride films in combination with selective semiconductor-on-insulator (SOI) device architecture is described. A method of using compressive and tensile nitride films in the shallow trench isolation (STI) process is described. High values of stress are achieved when the method is applied to a selective SOI architecture.

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