Stress accommodation in electronic device interconnect...

Details Stress accommodation in electronic device interconnect... Stress accommodation in electronic device interconnect...

2005-07-19

2005-07-19

Cuneo, Kamand (Department: 2841)

Electricity: conductors and insulators

Conduits, cables or conductors

Preformed panel circuit arrangement

C257S737000, C257S780000, C361S768000

Reexamination Certificate

active

06919515

ABSTRACT:
The providing of an array interface of conductive joint members for use in forming interconnections between mating surfaces such as a pad on a surface mount electronic device and contacts on a circuit card where one portion of the conductive joint members are of a relatively elongated or oval outline and are oriented with the longer dimension in one direction to accommodate wiring spacing and another portion oriented in a different direction for accommodating expansion stress. In manufacturing when the relatively elongated shape is oriented with the longer dimension along the wiping motion direction in a screen type forming of the conductive joint members the slurry of material that is to be the conductive joint members fills the openings in the screen more reliably and the areas of the conductive members are more uniform. The invention provides the advantages of an increase in the number of wiring lines, an increase in uniformity of wiped screen deposition conductive joint member formation, ability to employ more than one out of chip and wiring levels in expansion mismatch stress relief, and ability by conductive joint member dimensional alignment to improve reliability and flexibility.

REFERENCES:
patent: 5834848 (1998-11-01), Iwasaki
patent: 5859474 (1999-01-01), Dordi
patent: 6184581 (2001-02-01), Cornell et al.
patent: 6229711 (2001-05-01), Yoneda
patent: 6493238 (2002-12-01), Pai

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