Strengthening parity check bit protection for array-like...

Details Strengthening parity check bit protection for array-like... Strengthening parity check bit protection for array-like...

2011-05-24

2011-05-24

Rizk, Sam (Department: 2112)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Error/fault detection technique

C714S752000, C714S758000

Reexamination Certificate

active

07949932

ABSTRACT:
An LDPC parity check matrix originated using an array code provides more protection against errors for parity bits1through1−p, which can, during decoding, allow faster convergence to a higher LLR value for those bits as well as higher overall reliability of other parity check bits. The present parity check matrix provides an upper triangular sub-matrix (H1) for the parity check bits, where column weights for parity bits1through p−1 can be greater than 1. Aspects include encoders to encode user bits using the parity check matrix, decoders to decode based on the parity check matrix, systems comprising encoders and/or decoders, encoder and decoder methods; as well as computer readable media comprising programs for implementing such methods.

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Tian, T. et al. (2004). “Selective Avoidance of Cycles in Irregular LDPC Code Construction,” IEEE Transaction on Communication, 52(8):1242-1247.

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