Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
1999-04-30
2001-10-09
Teska, Kevin J. (Department: 2123)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C703S001000, C703S002000, C703S006000
Reexamination Certificate
active
06301697
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to the field of integrated circuit (IC) design. More specifically, the present invention relates to the application of optical and process pre-compensations to an IC mask layout.
2. Background Information
Over the years, because of the ever increasing complexity of IC designs, IC designers have become more and more reliant on electronic design automation (EDA) tools to assist them in designing ICs. These tools span the entire design process, from synthesis, placement, routing, to layout verification.
In the case of sub-micron ICs, designers are increasingly reliant on EDA tools to make the necessary pre-compensations (also referred to as corrections) to the edges of various geometries of an IC mask layout, to achieve the desired sub-micron IC images, as the “critical dimension” of the line-width becomes smaller than the wavelength of the light source. (The term mask as used herein is intended to include reticle also.) The various techniques for automatically making these corrections are commonly referred to as optical proximity corrections or optical and process corrections. In the later case, pre-compensations are made for process as well as optical distortions. Whether it is just for optical distortions only or for both types of distortions, hereinafter, all pre-compensations will be generically referred to as OPC.
Generally speaking, OPC techniques can be classified as rule-based techniques or model-based techniques. Under rule-based techniques, certain predetermined corrections are made if certain pre-specified conditions are detected, e.g. when certain geometric features are employed in the presence of certain other features within certain critical distances. Under model-based techniques, the corrections are calculated through computer simulations employing various models, e.g. optical models. Thus, generally speaking, rule-based techniques are less accurate, but they are less computational intensive. On the other hand, model-based techniques are more accurate, but they are more computationally intensive. Furthermore, for certain large ICs, some model-based techniques border on impractical, as they require very powerful computing systems. Therefore, designers of complex ICs are often faced with this difficult choice of accuracy versus computational efficiency.
Thus, a more streamlined model-based OPC technique that offers the desired improved accuracy but with less of the computational burden is desired.
SUMMARY OF THE INVENTION
An EDA tool is provided with an OPC module that performs optical and/or process pre-compensations on an IC mask layout in a streamlined manner, reusing determined corrections for a first area on a second area, when the second area is determined to be equivalent to the first area for OPC purposes. The OPC module performs the correction on the IC mask layout on an area-by-area basis, and the corrections are determined iteratively using model-based simulations, which in one embodiment, include resist model-based simulations as well as optical model-based simulations.
REFERENCES:
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International Search Report, PCT/US00/05658, Aug. 31, 2000.
Broda Samuel
Columbia IP Law Group, PC
Teska Kevin J.
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