Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – With lattice constant mismatch
Reexamination Certificate
2006-07-18
2006-07-18
Lee, Eddie (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Heterojunction device
With lattice constant mismatch
C257S192000, C257S196000, C257S288000, C257S347000, C257S408000, C257S410000, C257S411000, C257S412000, C257S413000
Reexamination Certificate
active
07078742
ABSTRACT:
A strained-channel semiconductor structure and method of fabricating the same. The strained-channel semiconductor structure comprises a substrate composed of a first semiconductor material with a first natural lattice constant. A channel region is disposed in the substrate and a gate stack is disposed over the strained channel region A pair of source/drain regions are oppositely disposed in the substrate adjacent to the channel region, wherein each of the source/drain regions comprises a lattice-mismatched zone comprising a second semiconductor material with a second natural lattice constant rather than the first natural lattice constant, an inner side and an outer side corresponding to the gate stack, and at least one outer sides laterally contacts the first semiconductor material of the substrate.
REFERENCES:
patent: 6573563 (2003-06-01), Lee et al.
patent: 6621131 (2003-09-01), Murthy et al.
patent: 6878592 (2005-04-01), Besser et al.
patent: 6930335 (2005-08-01), Yamaguchi et al.
patent: 10-012883 (1998-01-01), None
Lin Chun-Chieh
Yeo Yee-Chia
Arena Andrew O.
Lee Eddie
Taiwan Semiconductor Manufacturing Co. Ltd.
Thomas Kayden Horstemeyer & Risley
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