Electrical computers and digital processing systems: memory – Address formation – Generating a particular pattern/sequence of addresses
Reexamination Certificate
1999-05-14
2001-10-23
Kim, Matthew (Department: 2186)
Electrical computers and digital processing systems: memory
Address formation
Generating a particular pattern/sequence of addresses
C711S217000, C710S063000, C710S063000
Reexamination Certificate
active
06308249
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a memory which is used in an information processing apparatus such as a computer system and a method for storing code/data in the memory. Particularly, this invention relates to a memory which is accessed by a processor of a successive type effecting grey code addressing and method for storing code/data in such memory. More particularly, this invention relates to a memory which allows code or data to be read out in the same sequence as it was originally stored even when a processor of a successive type successively accesses to the memory based on an address of a grey code system, and a method for storing code/data in such memory.
2. Prior Art
Along with recent technological revolution, various kinds of computer systems including host/main frame computers, workstations and personal computers for consumers have been developed, manufactured and widely spread.
The basic components of such computer system includes a processor executing predetermined processing and a memory which the processor utilizes. Specifically, the processor is locally provided with a memory in itself, temporarily stores in the memory program codes which the processor executes and execution data and accesses to the memory at each processing step to read out a code from or write execution data into the memory. The processor and the memory are usually connected by a memory bus on which the processor sends an address to specify an access location in the memory.
However, the memory resource of a computer system is typically limited because the price per unit of storage capacity of a memory is relatively expensive. Thus, the computer system is provided with a storage of a large capacity and of a relatively inexpensive unit price, such as a hard disk, and code/data are exchanged or swapped between the memory and the disk as appropriate.
There may be a variety of schemes of addressing to allocate code or data in a memory space. In the area of the current computer science, a binary code system is most popular in which addresses in ascending decimal order are represented by binary numbers in the same order.
On the other hand, most of processors used in computer systems in these days are of a successive execution type in which addresses for accessing to the memory are consecutive. In other words, the program codes executed by the processor are normally described according to the sequence of execution and the processor can obtain the codes according to the sequence in a source program by successively generating addresses in ascending order, for example. An address generator provided in a processor chip is adapted to generate addresses, for example.
However, it has been pointed out that a problem of bit transition exists when addresses are outputted in the order in the source program to the memory space which is represented by binary codes. As mentioned in the above, a binary code is a simple binary representation of each numeric value (address value) in the order of a decimal number and there is no consideration of bit transition.
SUMMARY OF THE INVENTION
It is an object of this invention to provide an improved memory used in an information processing apparatus such as a computer system and a method of storing code/data in such memory.
It is another object of this invention to provide an improved memory which is accessed by a processor of a successive execution type effecting addressing in a grey code system and a method of storing code/data in such memory.
It is a further object of this invention to provide an improved memory in which code or data can be read out in the original order even when it is successively accessed by a processor of a successive execution type according to addressing in a grey code system and a method of storing code/data in such memory.
This invention is conceived in view of the above objectives and, in its first aspect, provides a memory which is accessed by a processor of successive type effecting addressing in a grey code system and in which addresses expressed by a grey code are allocated to codes/data according to the order of addresses in a binary code system.
This invention provides, in the second aspect thereof, a memory which is accessed by a processor of successive type effecting addressing in a grey code system and in which codes/data ordered in the sequence of addresses in a binary code system are reordered in the sequence of addresses in a grey code system for storage therein.
This invention provides, in the third aspect thereof, a method of storing code/data ordered in a binary code system in a memory in addresses converted to a grey code system in which code/data are consecutively allocated with addresses expressed in the grey code according to the order of the addresses in the binary code system.
This invention provides, in the fourth aspect thereof, a method of storing code/data ordered in a binary code system in a memory in addresses converted to a grey code system in which code/data ordered in the sequence of addresses in a binary code system is reordered to code/data in the sequence of addresses of a grey code system.
This invention provides, in the fifth aspect thereof, a method of storing code/data ordered in a binary code system in a memory in addresses converted to a grey code system comprising: a step of reading out code/data in the order of addresses expressed in a binary code from another memory, a step of sequentially allocating addresses expressed in a grey code to the read out code/data, and a step of storing the code/data according to the allocated grey code addresses.
According to the memory of this invention and the inventive method of storing code/data in such memory, code/data addressed in the original binary code system is stored in the memory without losing the original order and continuity even after the addresses are converted to a grey code system. Thus, a processor of successive type can read out code/data in the original order of execution by consecutively outputting addresses according to addresses of the grey code system. In addition, the power consumption of the address generator can be reduced in accessing to consecutive addresses by expressing addresses in the grey code.
Further objects, features and advantages of this invention will be apparent in the following detailed description based on embodiments of this invention and accompanying drawings.
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Computer System Architecture, 3rd Edition, M. Morris Mano, Prentice Hall, 1993, p. 84-85.
Chace Christian P.
International Business Machines - Corporation
Kim Matthew
Walsh Robert A.
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