Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
2007-03-06
2007-03-06
Bragdon, Reginald (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C711S152000, C711S163000, C711S112000, C711S113000, C711S114000
Reexamination Certificate
active
10900998
ABSTRACT:
A disk array controller reliably detects disk drive power-on-reset events that may cause a disk drive that has uncommitted write data stored in its cache to lose such data. The methods for detecting the power-on-reset events include operating the disk drives in an ATA security mode in which a power-on-reset of a disk drive will cause the drive to enter a locked state in which data transfer commands are aborted; and tracking power cycle count attributes of the disk drives over time. When a disk drive power-on-reset event is detected, the disk array may be efficiently restored to an operational state by re-executing or “replaying” a set of write commands that are cached within the disk array controller. The invention is also applicable to single-disk-drive storage systems.
REFERENCES:
patent: 5375243 (1994-12-01), Parzych et al.
patent: 6775794 (2004-08-01), Horst et al.
Intel Technical Advisory TA-617-1, dated Jan. 1, 2003, titled “Intel RAID Controllers: RAID Levels 1, 4, 5 or 10 Dirve Removal and Immediate Re-insertion May Cause An Array Failure.”
8-page document titled “AMIBIOS8 Hard Disk Security,” version 1.1, dated Nov. 26, 2002, downloaded from www.ami.com.
Harris Richard L.
Stonelake Paul R.
Tang Alex Ga Hing
Therene Christophe
Applied Micro Circuits Corporation
Bragdon Reginald
Knobbe Martens Olson & Bear LLP
Vo Thanh D
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