Storage system, control method thereof, and program

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition

Reexamination Certificate

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Details

C711S113000, C711S118000, C711S141000, C711S143000, C714S006130

Reexamination Certificate

active

11169979

ABSTRACT:
When a write-back request for writing back new data in a cache memory to disk devices forming a redundant configuration of RAID is generated, a write-back processing unit, reserves a parity buffer area in the cache memory, generates new parity, and then, writes the new data and the new parity to the corresponding disk devices. When an error in which the consistency of RAID is broken occurs in a plurality of the disk devices upon write performed by the write-back processing unit, a recovery processing unit reserves, in the cache memory, a cache stripe area storing data of the entire stripe including the new data which is to be written back, and causes the cache control unit to manage it.

REFERENCES:
patent: 5848229 (1998-12-01), Morita
patent: 5954822 (1999-09-01), Yashiro et al.
patent: 6408400 (2002-06-01), Taketa et al.
patent: 6816981 (2004-11-01), Morita
patent: 6-119126 (1994-04-01), None
patent: 11-143649 (1999-05-01), None
patent: 2001-344076 (2001-12-01), None

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