Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
2008-12-19
2011-11-29
Peugh, Brian (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
Reexamination Certificate
active
08069324
ABSTRACT:
In a particular embodiment, a system is disclosed that includes a controller to read data from and write data to a first storage medium. The controller is adapted to monitor logical block addresses (LBAs) of each read operation from the first storage medium and to selectively store files associated with the monitored LBAs that are less than a predetermined length at a second storage medium to enhance performance of applications associated with the LBAs.
REFERENCES:
patent: 7427027 (2008-09-01), Elhamias et al.
patent: 2009/0300269 (2009-12-01), Radke et al.
Intel Product Brief, “Intel NAND Storage Solutions”, 2008.
Bisson, T. and Brandt, S., “Reducing Hybrid Disk Write Latency with Flash-Backed I/O Requests,” Proceedings of the 15th International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems (MASCOTS), IEEE, 2007.
Enarson Karl L.
Moon John Edward
Cesari Kirk A.
Peugh Brian
Seagate Technology LLC
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