Storage device with binary and multivalued memory

Details Storage device with binary and multivalued memory Storage device with binary and multivalued memory

2011-07-12

2011-07-12

Patel, Hetul (Department: 2186)

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

C711SE12008

Reexamination Certificate

active

07979627

ABSTRACT:
A storage device includes: a binary flash memory that has a first storage area and a capacity of storing two values per cell; a multivalued flash memory that has a second storage area and a capacity of storing at least three values per cell; and a controller configured to arrange the first storage area ahead of the second storage area, logically combine the first storage area with the second storage area to form a single combined storage area, and perform data reading and data writing from and into the combined storage area. Data management information is stored in a head of the combined storage area according to a predetermined file system. The storage device of this arrangement has the advantages of both an SLC flash memory and an MLC flash memory.

REFERENCES:
patent: 2008/0086588 (2008-04-01), Danilak et al.
patent: 10-260908 (1998-09-01), None
patent: 11-31102 (1999-02-01), None
patent: 2000-173281 (2000-06-01), None
patent: 2001-306393 (2001-11-01), None
patent: 2002-8380 (2002-01-01), None
patent: 2006-048746 (2006-02-01), None
patent: WO 2006/088727 (2006-08-01), None
patent: WO 2007/037757 (2007-04-01), None
Machine translation of Sukegawa Hiroshi (JPN: 11-031102).
Machine translation of Fukuzumi Tomoya (JPN: 2001-306393).
Machine translation of Masabumi et al. (JPN: 2000-173281).
Notification of Reason for Rejection dated Jun. 22, 2010 for Japanese Patent Application No. 2008-004691.
Office Action in corresponding Japanese Application No. 2008-004691, mailed Apr. 12, 2011.

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