Storage device and data output circuit

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring

Reexamination Certificate

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Details

C711S103000, C711S165000, C713S100000, C714S006130, C714S006130, C714S006130

Reexamination Certificate

active

07861057

ABSTRACT:
A memory is provided which simplifies the manufacturing process on the supplier side while satisfying specifications provided from the user side. An address space of a memory core includes an information storage region, a code region, and a no-write region. The information storage region includes a first region where no-write region information is written and a second region where a fixed value is written. Program code is written in the code region. The no-write region information indicates the position of the no-write region, and the fixed value indicates a fixed value that is intended to be written to the no-write region. The ROM selects between the fixed value and original read data that is obtained by a data selecting section directly from the memory core, and outputs the selected one as read data.

REFERENCES:
patent: 5608910 (1997-03-01), Shimakura
patent: 6360293 (2002-03-01), Unno
patent: 2003/0233512 (2003-12-01), Lee
patent: 9-231800 (1997-09-01), None
patent: 2006-18453 (2006-01-01), None

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