Storage controller for cache slot management

Details Storage controller for cache slot management Storage controller for cache slot management

2011-02-08

2011-02-08

Ellis, Kevin L (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

Reexamination Certificate

active

07886114

ABSTRACT:
When a first channel processor from among a plurality of channel processors receives an I/O request from a host system, a second channel processor, which is to execute a part of the processing to respond to the I/O request, is selected from among the channel processors based on the LM directories of the respective channel processors. The selected second channel processor checks whether there is a cache hit. If there is a cache hit, it transfers the data from the cache memory to the buffer memory. The first channel processor then processes the I/O request using the data transferred to the buffer memory.

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Jim Handy, “The Cache Memory Book”, 1998, Academic Press, 2ndEdition, p. 126.

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