Storage controller and methods for using the same

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture

Reexamination Certificate

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Details

C710S022000, C710S055000, C710S057000, C710S308000

Reexamination Certificate

active

11038711

ABSTRACT:
In a first aspect, a first method is provided for processing a request. The first method includes the steps of (1) receiving a request in first logic of a controller from a device master; (2) issuing a response to the device master to reissue the request at a later time; (3) notifying second logic of the controller of the request; (4) determining at least one of whether the request is valid and enough buffers are available to complete the request; (5) programming a filtering pipe; and (6) responding to the first logic based on at least one of whether the request is valid and enough buffers are available to complete the request such that the first logic may employ the filtering pipe to complete the request. The first logic operates in a first clock domain and second logic operates in a second clock domain. Numerous other aspects are provided.

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Definition of PCI-X Bus, www.interfacebus.com.
DMA: What it is and How it Works, FreeBSD Developers' Handbook, Copyright 1995, 1997.
Definition of PCI-X Bus, www.interfacebus.com, unknown date.

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