Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
Reexamination Certificate
2007-01-30
2007-01-30
Shah, Sanjiv (Department: 2185)
Electrical computers and digital processing systems: memory
Storage accessing and control
Shared memory area
C711S114000, C714S006130, C714S010000, C714S011000, C714S012000, C714S013000, C709S213000
Reexamination Certificate
active
10837317
ABSTRACT:
One or more master CHN21AM and one or more back-up CHN21AC are provided. In each of the one or more back-up CHNs21AC, the I/O processor504is in a power on state, and the NAS processor is in a power off state. The I/O processor504accesses a shared memory25periodically, and if the fact that a problem has occurred in any master CHN21AM has been written to the shared memory25, then the power supply of the NAS processor506is turned on, and processing is carried out for switching the back-up CHN21AC in which the I/O processor504is installed, to a master CHN21AM.
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Kobayashi Naotaka
Nakayama Shin-ichi
Takata Yutaka
Mattingly ,Stanger ,Malur & Brundidge, P.C.
Savla Arpan
Shah Sanjiv
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