Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2005-09-28
2009-06-30
Lamarre, Guy J (Department: 2112)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S052000, C714S054000
Reexamination Certificate
active
07555699
ABSTRACT:
A method for address error check in a storage control circuit having a storage unit operable to store data in a storage area specified by an address encodes a first code assigned to the address with an even number of bits, encodes a second code assigned to the data written to the storage unit with an odd number of bits, generates a check code based on the first and second codes and stores the check code in the storage unit in correspondence with the data written to the storage unit, and conducts an error check based on data read from the storage unit, a check code corresponding to the data read, and a read address, thus detecting a multi-bit address error.
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European Search Report issued in corresponding European Patent Application No. 05253806.3-2224.
Inagaki Jun-ichi
Koyabu Masao
Kuramoto Masahiro
Tsuiki Jun
Fujitsu Limited
Fujitsu Patent Center
Lamarre Guy J
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