Storage circuit apparatus

Details Storage circuit apparatus Storage circuit apparatus

1999-05-06

2001-02-06

Hoang, Huan (Department: 2818)

Static information storage and retrieval

Systems using particular element

Capacitors

C365S229000, C365S185080, C365S051000

Reexamination Certificate

active

06185124

ABSTRACT:

FIELD OF THE INVENTION
The present invention generally relates to a storage circuit apparatus, and more particularly relates to integrated circuit memory consisting of a support material, upon which a semiconductor chip having at least one “shadow RAM” is integrated along with a capacitance furnishing the energy required for a STORE operation in the event of a “power down” condition.
BACKGROUND OF THE INVENTION
In principle, it is known that in semiconductor circuits, IC support strips with outside connections may be provided with a semiconductor chip and a housing consisting of a casting compound. The connection between the IC support strip and semiconductor chip is made by means of “bond” wires or other conductor materials.
Semiconductor memories represent a large sector among semiconductor circuits. They are classified in numerous different types, of which examples are given below.
In an electrically erasable programmable read only memory (EEPROM), an IC support strip e.q., lead frame, is provided with outside connections to an EEPROM chip and the assembly is encased in a housing consisting of a casting compound. This structure corresponds to the basic structure of semiconductor circuits. With EEPROMs, non-volatile storage of data and an unlimited number of read cycles are possible. There are disadvantages in that the number of write cycles is limited and the writing speed is generally slow.
In the case of static random access memory (SRAMs) the structure corresponds to the general structure of semiconductor circuits. An SRAM generally includes an IC lead frame for providing outside connections, an SRAM chip and a housing. With SRAMs, an unlimited number of write and read cycles are possible, and substantially higher access speed for reading and writing than with EEPROMs. However, only volatile data storage is possible, which means that the data is preserved only while operating voltage is applied; in the “power down” case, the stored data is lost.
To avoid the disadvantage of volatile data storage in SRAM, methods are employed for supplying alternative voltage to the SRAM when the system supply voltage is cut off. One such method is battery-supported “backup,” utilized for example in Bat SRAMs.
A Bat SRAM consists of a “board” with an SRAM and a voltage detector IC mounted thereon, or SRAM with integrated voltage detector therein. Contact strips are mounted on the board. These serve for connecting the Bat SRAM to other devices. Spacing and arrangement of the contacts are the same as for conventional “dual in line” plastic housings. A battery is arranged on the board as well. The entire apparatus is surrounded by a housing, and is filled with a casting compound.
The battery integrated in the component provides the voltage supply for the purpose of preserving data in the SRAM chip in the absence of external voltage supply.
Bat SRAMs exhibit generally higher access speeds compared to EEPROMs and an unlimited number of write cycles. To be sure, high production costs and reduced dependability, owing to the large number of components and connections used, are disadvantageous. Other disadvantages to be noted are high assembly outlay in production, a limited range of service and storage temperature due to the battery, and a limitation of the useful life of the component by limited battery lifetime, typically for example ten years. Also, possibilities of miniaturization and use as a surface mount device (SMD) component are limited.
A further development of Bat SRAMs are Bat SRAMS in the SMD housing with plug-in battery capsules. These correspond to the basic structure of semiconductor circuits. The IC support strips with outside connections are provided with an SRAM chip having integrated voltage detector and housing. Additionally, plug or spring contacts are worked into the housing, enabling the electrical connection between the battery capsule and the IC proper. Thus, properties of conventional Bat SRAMs, in particular with a view to production of SMD components, are improved. Besides, the plug-in battery module permits replacement of the battery in the soldered in condition of the component.
Of course, a high assembly outlay in production and reduced dependability due to the numerous components and connections used constitute disadvantages. Besides, dependability is limited by non-hermetically-sealed capsuling of the electrical connection between battery capsule and SRAM-IC. Also, a limited range of service and storage temperatures due to the battery and additional maintenance outlay due to replacement cycles of the battery capsule should be mentioned.
A combination of the properties of volatile RAMs, c.g. SRAM or Dynamic Random Access Memory (DRAM), offering the advantage of fast memory access for reading and writing and an unlimited number of write and read cycles, and non-volatile memories, e.g. EEPROMs, ferroelectric RAMs, magnetoresistive RAMs, offering the advantage of data conservation even with supply voltage shut off, is found in non-volatile “shadow” RAMs.
A modification of these shadow RAMs are shadow SRAMs, in which a storage configuration of volatile SRAM and nonvolatile EEPROM is integrated. Compared to Bat SRAMs, shadow SRAMs are distinguished for example by considerably simpler design structure, smaller dimensions, greater dependability and useful life, wider range of service and storage temperature, and higher access speed.
This quality is achieved by a circuit apparatus integrated on the semiconductor chip, which, besides the SRAM region proper, contains an additional EEPROM matrix and a complex control logic.
Shadow SRAMs are predominantly fabricated in standard IC housings; the design structure corresponds to the structure of SRAMs or EEPROMs.
The shadow SRAM is operated like an ordinary SRAM; some types are “pin”-compatible with standard SRAMs or Bat SRAMs. Write and read accesses take place in the SRAM region with access speeds comparable to that of standard SRAMs. The SRAM region may be read and inscribed any number of times.
The SRAM region of the shadow SRAM is connected bitwise to the EEPROM matrix. In the integrated EEPROM, a hardware or software signal, within a few milliseconds, accomplishes lasting security of the information stored in the SRAM (STORE) or a reloading of the EEPROM content into the SRAM (RECALL). When service voltage is switched on, the information stored in the EEPROM is loaded into the SRAM.
Optionally, shadow SRAM types are available which automatically secure the SRAM content in the EEPROM in event of voltage interruptions. Such devices are called “PowerStore” devices. The PowerStore type contains an integrated voltage monitor that automatically triggers a STORE operation upon decline of the service voltage below a defined minimum (V
switch
)
The energy required for PowerStore is furnished, for example, by a support capacitor connected by way of an additionally circuited “pin.” By the connection of the external capacitor to this so-called V
cap
pin, a shadow SRAM voltage supply independent of the declining system energy (power down) is secured, so that the process of data securement can be concluded independently of the time curve of the power-down.
In some applications, the use of a shadow SRAM with standard “SRAM pin layout” is required. This relates for example to pre-existing circuits in which it is desired to replace a standard SRAM or Bat SRAM hitherto used with a shadow SRAM without requiring changes in circuit layout.
There are also known shadow SRAM types that are compatible with standard SRAMs both in structure and in “pin out.” These types consist of a shadow SRAM chip fastened to a lead frame and cast in a standard SRAM housing. On the basis of the compatibility required, in these types of devices, the additional connection of a condenser to the IC to furnish the energy supply for power-down is not feasible.
In these types, therefore, the energy required for PowerStore is furnished by the residual energy remaining in the system. Here, requirements must be observed regarding the power down voltage drop in the system.

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