Storage cell using low powered/low threshold CMOS pass transisto

Details Storage cell using low powered/low threshold CMOS pass transisto Storage cell using low powered/low threshold CMOS pass transisto

1994-12-16

1995-11-28

Fears, Terrell W.

Static information storage and retrieval

Systems using particular element

Semiconductive

36518909, Q11C 1300

Patent

active

054714214

ABSTRACT:
A storage cell includes a first bit line, a storage circuit, and a pass transistor. The storage circuit has a first storage node for holding a logic state indicative of a logic value. The pass transistor is coupled to the first bit line and the first storage node for establishing a conduction path therebetween. The pass transistor receives a bias voltage to switch the pass transistor into a substantially nonconducting state when the storage cell is not being accessed. The reverse bias on the first transistor substantially reduces the leakage current through the pass transistor.

REFERENCES:
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J. Testa, et al., "Lowered Supply and Threshold Voltage Effects on CMOS Circuit Characteristics," SMLI 94-0179 pp. 1-25 (Jul. 15, 1994).
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