Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2006-11-14
2006-11-14
Kim, Matthew (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C711S114000, C711S119000
Reexamination Certificate
active
07136963
ABSTRACT:
To provide a storage system which enables usage of a greater volume of cache than that of a cache memory provided to a disk array control unit, including a first disk array control unit, a second disk array control unit, a plurality of disks, and a disk array control unit communication path between a first data transfer control unit and a second data transfer control unit, wherein the first data transfer control unit selectively sets either a first path through a first host input/output control unit, the first data transfer control unit, and a first disk input/output control unit, or a second path through the first host input/output control unit, the first data transfer control unit, the disk array control unit communication path, the second data transfer control unit, and a second disk input/output control unit, and then processes a data input/output request from a host.
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Matsunami Naoto
Mizuno Yoichi
Nishimoto Akira
Ogawa Junji
Hitachi , Ltd.
Kim Matthew
Krofcheck Michael
Townsend and Townsend / and Crew LLP
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