Image analysis – Image compression or coding – Pyramid – hierarchy – or tree structure
Reexamination Certificate
1999-02-01
2002-08-27
Chen, Wenpeng (Department: 2624)
Image analysis
Image compression or coding
Pyramid, hierarchy, or tree structure
C382S238000, C375S240110, C375S240120
Reexamination Certificate
active
06442297
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a storage apparatus, a writing method and a reading method and, more particularly, to such apparatus and methods suitable for use in performing hierarchical coding for forming images in hierarchical order having different number of pixels.
In a hierarchical coding method, high-resolution image data is set as image data in a lowermost layer or a first layer, image data in a second layer is formed of a number of pixels smaller than the number of first-layer pixels, image data in a third layer is formed of a further smaller number of pixels, followed by formation of image data from a fourth layer to a predetermined uppermost layer. Image data in each layer may be displayed on a monitor having a resolution (a number of pixels) corresponding to the layer. Accordingly, a user can select image data (hierarchically coded image data) corresponding to the resolution of the user's monitor to view corresponding images. As an example, an image corresponding to one layer can be used for enlargement of an image corresponding to one of the respective higher layers in such a manner that, when the image corresponding to the higher layer is displayed, it is replaced with the image corresponding to the lower layer by a user operation or the like.
In setting image data having a certain resolution as image data of the lowermost layer (first layer), successively forming image data of upper layers, and storing or transmitting the image data of all the layers, a storage capacity or transmission capacity for the image data of the upper layers is required in addition to that for storage or transmission or the like of the image data of the lowermost layer only. A hierarchical coding method has been proposed which prevents such increase in storage capacity or the like. This method will be herein below described with respect to a three-layer hierarchical coding situation in which the sum of the values of four pixels, i.e., 2×2 column and row arrangement of four pixels, is set as a pixel (pixel value) of an upper layer.
In
FIG. 16
, the 4×4 arrangement of pixels are the pixels of the lowermost-layer image. A sum of the four pixel values h
00
, h
10
, h
01
, and h
11
of such 4×4 arrangement is calculated and set as an upper left pixel m
0
of a second layer which is a 2×2 pixel arrangement. Similarly, a sum m
1
of the four pixel values h
20
, h
30
, h
21
, and h
31
, a sum m
2
of the four pixel values h
02
, h
12
, h
03
, and h
13
, and a sum m
3
of the four pixel values h
22
, h
32
, h
23
, and h
33
are calculated and set as an upper right pixel, a lower left pixel, and a lower right pixel, respectively, of the second layer. Further, a sum q
0
of the four pixel values m
0
, m
1
, m
2
, and m
3
of the 2×2 pixels in the second layer is calculated and set as a pixel of a third-layer image, which is the uppermost layer in this situation.
If all of the pixels h
00
to h
33
, m
0
to m
3
, and q
0
described above are stored in their respective original forms, an additional storage capacity or the like corresponding to the second-layer pixels m
0
to m
3
and third-layer pixel q
0
is required, as mentioned above. As a result, the third-layer pixel q
0
may be set at the position corresponding to the lower right pixel m
3
in the second-layer, as shown in
FIG. 16
, wherein the second layer is formed of pixels m
0
to m
2
and q
0
. Further, the second-layer pixel m
0
may be set at the position corresponding to the lower right pixel h
1
in the first-layer, as shown in FIG.
16
. (Recall that m
0
may be obtained from h
00
, h
10
, h
01
, and h
11
of the first layer.) Similarly, the other second-layer pixels m
1
, m
2
, and q
0
may also be set in pixels h
31
, h
13
, and h
33
of the first layer. Although pixel q
0
is not obtained directly from the first-layer pixels h
22
, h
32
, h
23
, and h
33
, pixel q
0
(instead of pixel m
3
) is set at the position corresponding to pixel h
33
because it is set in the second layer in place of m
3
which was obtained directly from the first-layer pixels h
22
, h
32
, h
23
, and h
33
.
Thus, in the above-described situation, a total of 4×4 or sixteen pixels may be formed. Such number of pixels is the same as that of the lowermost layer. As such, an increase in storage capacity or the like can be prevented.
Decoding of the above-described pixel q
0
(which replaced m
3
and h
33
) and pixels m
0
to m
2
(which respectively replaced pixels h
11
, h
31
, and h
13
) can be performed as described below.
That is, the value of q
0
is the sum of m
0
to m
3
(i.e., q
0
=m
0
+m
1
+m
2
+m
3
). Therefore, m
3
can be obtained from the equation m
3
=q
0
−(m
0
+m
1
+m
2
). Also, m
0
is the sum of h
00
, h
10
, h
01
, and h
11
(i.e., m
0
=h
00
+h
10
+h
01
+h
11
). Therefore, h
11
can be obtained from the equation h
11
=m
0
−(h
00
+h
10
+h
01
). Each of h
31
, h
13
, and h
33
may be obtained in a similar manner. The pixel h
33
is obtained upon obtaining m
3
, as described above.
In the above-described hierarchical coding, a delay circuit for performing line delay of lower-layer pixels (pixel values) is utilized as well as a versatile memory (for example, a static random access memory (SRAM) or a dynamic RAM (DRAM)) for storing results of such hierarchical coding. As an example, and with reference to
FIG. 16
, an operation may be performed relating to the equation m
0
=h
00
+h
10
+h
01
+h
11
to obtain the second-layer pixel m
0
, which utilizes first-layer pixels h
00
, h
10
, h
01
, and h
11
in two lines. Image data may be supplied to (or written into) a memory in a predetermined order, such as a line scanning order from left to right and from top to bottom with respect to an arrangement of pixels. Image data may also be read out from the memory in line scanning order with respect to the pixels. Therefore, to obtain the second-layer pixel m
0
, an operation is performed in which the line starting at h
00
is delayed by one line and one pixel to await supply of h
01
and h
11
of the line starting at h
01
, m
0
is calculated and then the line starting at h
00
is thereafter written to the memory.
Thus, in the above-described coding technique, a delay circuit for performing line delay of image data in addition to a memory for storing results of hierarchical coding may be utilized, thereby increasing the size of the respective coding apparatus and hindering the processing speed thereof.
OBJECTS AND SUMMARY OF THE INVENTION
An object of the present invention is to provide a hierarchical coding technique which does not utilize a delay circuit as in the above-described hierarchical coding apparatus.
Another object of the present invention is to provide a hierarchical coding apparatus having a relatively small size and capable of high-speed processing.
In accordance with an aspect of the present invention, a storage apparatus is provided for storing a first image corresponding to a low layer and having a plurality of pixels and a second image corresponding to a high layer and having a plurality of pixels, in which a pixel of the second image is formed from N pixels of the first image, and in which the pixels of the first image are inputted one by one in a predetermined order. The apparatus comprises a low layer storage device for storing the first image corresponding to the low layer; a high layer storage device for storing the second image corresponding to the high layer; a controller for controlling read and write operations with respect to the low layer and high layer storage devices, in which the controller reading out the first image stored in the low layer storage device as a unit group of N−1 pixels; and a pixel generator for generating one pixel of the second image by using the N pixels of the first image which include the N−1 pixels of the first image read out from the low layer storage device and one input pixel of the first image.
In accord
Kondo Tetsujiro
Okumura Akihiro
Chen Wenpeng
Frommer William S.
Frommer & Lawrence & Haug LLP
Smid Dennis M
Sony Corporation
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