Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2005-04-26
2005-04-26
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S460000, C438S464000
Reexamination Certificate
active
06884717
ABSTRACT:
An etching based semiconductor wafer thinning arrangement usable as an improved alternative to the usual grinding and polishing wafer thinning. The thinned wafer includes a structurally enhancing wafer backside grid array of original wafer thickness semiconductor material with grid cells surrounding individual thinned wafer areas and serving to improve the strength and physical rigidity characteristics of the thinned wafer. Preferably this grid array is supplemented with an additional, wafer periphery-located, backside ring of semiconductor material also of original wafer thickness. Ability to avoid a wafer front side mounting during thinning accomplishment, fast etching, reduced wafer breakage, enhanced wafer strength and improved wafer handling achieved with the disclosed thinning arrangement all contribute to achieved advantages over conventional wafer thinning. Gallium arsenide or other semiconductor materials are contemplated along with use in radio frequency or other integrated circuit devices of either the single transistor or complete integrated circuit components types.
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Cassity Paul D.
Desalvo Gregory C.
Ebel John L.
Quach Tony K.
Walker Anders P.
Fourson George
Hollins Gerald B.
Kundert Thomas L.
Maldonado Julio J.
The United States of America as represented by the Secretary of
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