Stereolithographically marked semiconductor devices and methods

Details Stereolithographically marked semiconductor devices and methods Stereolithographically marked semiconductor devices and methods

2000-12-14

2002-12-03

Lam, Cathy (Department: 1775)

Stock material or miscellaneous articles

Structurally defined web or sheet

Including aperture

C428S131000, C428S134000, C428S135000, C428S136000, C283S037000, C283S070000, C257S798000

Reexamination Certificate

active

06489007

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to methods of marking semiconductor devices and to semiconductor devices so marked. Particularly, the present invention pertains to the use of stereolithographic techniques to mark semiconductor devices and to stereolithographically marked semiconductor devices.
2. State of the Art
Semiconductor Device Marking
Since the first semiconductor devices became commercially available, manufacturers have found it necessary to mark each chip or chip assembly (bare die or packaged die) with the company name, a part or serial number, or other information such as lot number or die location. Conventional marking methods utilize a mechanical device to transfer ink contained in an ink pad to the surface of a roller or stamp. An individual chip is then stamped, and the automated process is repeated for subsequent chips.
Because of its mechanical nature and the drying time associated with ink, an ink stamping process is relatively slow. Moreover, if the mark is accidentally touched prior to complete drying, the mark will smudge. In chip manufacturing processes using such an ink stamping method, the ink marking operation may have to be included at a relatively early stage of production (if the die itself is to be marked) or just after post-encapsulation processing (if the package is to be marked) to allow for drying time without affecting the production rate. Such early marking may result, however, in marking defective chips that never make it completely through the manufacturing and testing process.
Moreover, when the marked chips are packaged, ink stamping presents an additional step in the fabrication and packaging of the chips.
Another problem associated with ink stamping methods is that the quality of ink stamped marks may substantially vary over time. This variation may be dependent upon the quantity of ink applied, ambient temperature and humidity, and/or the condition of the surface of the stamp. In any event, the consistency of a stamped mark may vary widely from chip to chip.
As a result of the deficiencies associated with ink stamping, it has become increasingly popular to use a laser beam to mark the surface of a chip. Unlike ink stamping, laser marking is very fast, requires no curing time, has a consistently high quality, and can take place at the end of the manufacturing process so that only good chips are marked.
Various machines and methods have been developed for marking a chip package with a laser. As illustrated in U.S. Pat. No. 5,357,077 to Tsuruta, U.S. Pat. No. 5,329,090 to Woelki et al., U.S. Pat. No. 4,945,204 to Nakamura et al., U.S. Pat. No. 4,638,144 to Latta, Jr., U.S. Pat. No. 4,585,931 to Duncan et al., and U.S. Pat. No. 4,375,025 to Carlson, a semiconductor device is placed in a position where a laser beam, usually produced by a carbon dioxide, Nd:YAG, or Nd:YLF laser, inscribes various characters or other information on a surface of the semiconductor device. Basically, the laser beam burns the surface of the chip package such that a different reflectivity from the rest of the chip package surface is formed. By holding the packaged chip at a proper angle to a light source, the information inscribed on the chip package surface by the laser can be read. Various materials are known in the art that are laser reactive (e.g., capable of changing color when contacted by a laser beam). As described in U.S. Pat. No. 4,861,620 to Azuma et al., U.S. Pat. No. 4,753,863 to Spanjer, and U.S. Pat. No. 4,707,722 to Folk et al., the part or component may be partially comprised of the laser markable material or have a coating of the material on the surface of the part or component to be marked.
Using a laser to mark a chip is a fast and economical means of marking. There are, however, certain disadvantages associated with state-of-the-art laser marking techniques that merely burn the surface to achieve the desired mark in comparison to ink stamping. For example, ink stamping provides a clearly visible image on the surface of a chip at nearly every angle of incidence to a light source. A mark burned in a surface by a laser, on the other hand, may only be visible at select angles of incidence to a light source. Further, oils or other contaminants deposited on the chip surface subsequent to marking may blur or even obscure the laser mark. Additionally, because the laser actually burns the surface of the work piece, for bare die marking, the associated burning may damage the internal circuitry of the chip directly or by increasing internal die temperature beyond acceptable limits. Moreover, where the manufactured part is not produced of a laser reactive material, laser reactive coatings applied to the surface of a component add expense and may take hours to cure. In addition, when the chip is packaged, as with ink stamping, laser marking requires an additional post-packaging step.
Thus, it would be advantageous to provide a marking technique that combines the speed and precision of laser marking with the contrast and distinctiveness of ink stamping, without any substantial curing or drying time. Moreover, it would be advantageous to develop a method and apparatus for marking the surface of a semiconductor chip that does not harm the circuitry enclosed therein. It would also be advantageous to provide a method for marking semiconductor chips as the chips are being packaged.
Stereolithography
In the past decade, a manufacturing technique termed “stereolithography”, also known as “layered manufacturing”, has evolved to a degree where it is employed in many industries.
Essentially, stereolithography as conventionally practiced involves utilizing a computer to generate a three-dimensional (3-D) mathematical simulation or model of an object to be fabricated, such generation usually effected with 3-D computer-aided design (CAD) software. The model or simulation is mathematically separated or “sliced” into a large number of relatively thin, parallel, usually vertically superimposed layers, each layer having defined boundaries and other features associated with the model (and thus the actual object to be fabricated) at the level of that layer within the exterior boundaries of the object. A complete assembly or stack of all of the layers defines the entire object, and surface resolution of the object is, in part, dependent upon the thickness of the layers.
The mathematical simulation or model is then employed to generate an actual object by building the object, layer by superimposed layer. A wide variety of approaches to stereolithography by different companies has resulted in techniques for fabrication of objects from both metallic and non-metallic materials. Regardless of the material employed to fabricate an object, stereolithographic techniques usually involve disposition of a layer of unconsolidated or unfixed material corresponding to each layer within the object boundaries, followed by selective consolidation or fixation of the material to at least a partially consolidated, or semisolid, state in those areas of a given layer corresponding to portions of the object, the consolidated or fixed material also at that time being substantially concurrently bonded to a lower layer of the object to be fabricated. The unconsolidated material employed to build an object may be supplied in particulate or liquid form, and the material itself may be consolidated or fixed, or a separate binder material may be employed to bond material particles to one another and to those of a previously-formed layer. In some instances, thin sheets of material may be superimposed to build an object, each sheet being fixed to a next lower sheet and unwanted portions of each sheet removed, a stack of such sheets defining the completed object. When particulate materials are employed, resolution of object surfaces is highly dependent upon particle size, whereas when a liquid is employed, surface resolution is highly dependent upon the minimum surface area of the liquid which can be fixed and the minimum thickness of a layer that

Affiliated with

Also associated with

Rating

Stereolithographically marked semiconductor devices and methods does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Stereolithographically marked semiconductor devices and methods, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Stereolithographically marked semiconductor devices and methods will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2984176