Stepped tip junction with spacer layer

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S900000, C438S303000

Reexamination Certificate

active

07112859

ABSTRACT:
Embodiments of the invention provides a stepped tip junction region between a source/drain region of a transistor and a gate. In some embodiments, a spacer of the transistor includes a tip junction spacer layer and a source/drain spacer layer.

REFERENCES:
patent: 5747373 (1998-05-01), Yu
patent: 5994747 (1999-11-01), Wu
patent: 5998274 (1999-12-01), Akram et al.
patent: 6144071 (2000-11-01), Gardner et al.
patent: 6225176 (2001-05-01), Yu
patent: 6258680 (2001-07-01), Fulford, Jr. et al.
patent: 6548877 (2003-04-01), Yang et al.
patent: 6917085 (2005-07-01), Bae et al.
patent: 2002/0008295 (2002-01-01), Yang et al.
patent: 2004/0056301 (2004-03-01), Ahmed et al.
IBM Technical Disclosure Bulletin (vol. 22, No. 11, pp. 5146-5147, by Bassous et al), Apr. 1980.
James R. Pfiester, “Surface-Graded LDD MOSFET”, Motorola Technical Developments, vol. 9, Aug. 1989.

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