Statistical optimization and design method for analog and...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000

Reexamination Certificate

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07669150

ABSTRACT:
A computer implemented method of performing projection based polynomial fitting. The method includes generating a plurality of sampling points as a function of variables. The method also includes forming a polynomial model template representative of the plurality of sampling points. According to embodiments of the present invention, the polynomial model template comprises at least one polynomial coefficient. The method further includes forming a low-rank matrix to approximate the polynomial coefficient.

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patent: 6615164 (2003-09-01), Gopisetty et al.
patent: 2005/0251373 (2005-11-01), Daems et al.
patent: 2006/0095236 (2006-05-01), Phillips
Eeckelaert et al.; “Generalized Posynomial Performance Modeling”; 2003; IEEE; All pages.
Liu et al.; “Model Order-Reduction of RC(L) Interconnect Including Variational Analysis”; 1999; ACM; All pages.
Daniel et al.; “A Multiparameter Moment-Matching Model-Reduction Approach for Generating Geometrically Parameterized Interconnect Performance Models”; May 2004; IEEE; All pages.
Li et al.; “Robust Analog/RF Circuit Design with Projection-Based Posynomial Modeling”; Nov. 2004; IEEE; All Pages.
Daems et al.; “Simulation-Based Generation of Posynomial Performance Models for the Sizing of Analog Integrated Circuits”; May 2003; IEEE; All pages.

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