Static type semiconductor memory device with two word lines for

Details Static type semiconductor memory device with two word lines for Static type semiconductor memory device with two word lines for

1997-06-13

1998-06-09

Nelms, David C.

Static information storage and retrieval

Systems using particular element

Flip-flop

365156, 365190, G11C 1100

Patent

active

057645655

ABSTRACT:
A memory cell includes two bipolar transistors. An upper side word line is connected to the gates of one access transistor and one depletion type transistor in the memory cell. A lower side word line is connected to the gates of the other access transistor and the other depletion type transistor in the memory cell. In data write operation, the potential on the upper side word line is set to "H" level for a prescribed period and the potential on the lower side word line is thereafter set to "H" level for a prescribed period, regardless of the type of data. As a result, a circuit related to row decoding can be simplified since a circuit for determining the type of data is not necessary in the circuit related to row decoding.

REFERENCES:
patent: 4868628 (1989-09-01), Simmons
patent: 5483483 (1996-01-01), Choi et al.
patent: 5570312 (1996-10-01), Fu
patent: 5673230 (1997-09-01), Kuriyama

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