Static semiconductor memory with reduced components and intercon

Details Static semiconductor memory with reduced components and intercon Static semiconductor memory with reduced components and intercon

1980-08-15

1983-03-22

Hecker, Stuart N.

Static information storage and retrieval

Systems using particular element

Flip-flop

307279, G11C 1140

Patent

active

043778569

ABSTRACT:
Disclosed is a static semiconductor memory which is comprised of a pair of cross-coupled switching means forming a set-node, a reset-node, and a common-node; and a pair of variable conductance means. Each of the variable conductance means are characterized as having first and second terminals with negligible conductance therebetween when the voltage thereacross is less than a predetermined breakdown level, and as having substantial conductance when the voltage thereacross exceeds the breakdown level. The first terminals of the pair of variable conductance means are coupled respectively to the set-node and reset-node. A pair of bit lines are coupled respectively to the second terminals on the pair of variable conductance means; and a word line is coupled to the common-node.

REFERENCES:
patent: 3573499 (1971-04-01), Lynes
patent: 3610967 (1971-10-01), Palfi
patent: 3949385 (1976-04-01), Sonoda
Klepp et al., "Circuit Useable as Storage Cell or Detector-Amplifier Cell", IBM Tech. Disc. Bul., vol. 15, No. 5, 10/72, pp. 1720-1721.
Gaensslen, "FET Diode Stored Charge Memory Cell", IBM Tech. Disc. Bul., vol. 11, No. 8, 1/69, pp. 997-998.
Wiedmann, "Monolithic Memory Cell", IBM Tech. Disc. Bul., vol. 13, No. 5, 10/70, pp. 1362-1363.

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