Static semiconductor memory device for stable operation

Details Static semiconductor memory device for stable operation Static semiconductor memory device for stable operation

1992-06-12

1994-03-22

LaRoche, Eugene R.

Static information storage and retrieval

Systems using particular element

Capacitors

365204, 36518911, G11C 700

Patent

active

052970787

ABSTRACT:
In a semiconductor memory device, when an AND gate is activated by an address line, an MOS transistor of an n-type channel QN1 is turned on. A potential of a word line WL related thereto is then set to substantially identical to a power source voltage Vcc. Simultaneously, a capacitor C1 connected to an output node of an inverter 104 starts a charging operation. The transistor QN1 is turned off and the potential of the word line WL is lowered. Consequently, the voltage substantially identical to the voltage Vcc is applied via a digit line DG1 or CDG1 to a flip flop circuit, which accordingly conducts a stable operation.

REFERENCES:
patent: 4536859 (1985-08-01), Kamuro
patent: 4612462 (1986-09-01), Asano et al.
patent: 4697252 (1987-09-01), Furuyama et al.
patent: 4896297 (1990-01-01), Miyatake et al.
patent: 5113374 (1992-05-01), Matsui
patent: 5214601 (1993-05-01), Hidaka et al.

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