Static read only memory (ROM)

Static information storage and retrieval – Read only systems – Semiconductive

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Details

365181, 365182, G11C 1700, G11C 1140

Patent

active

054208181

ABSTRACT:
A static read-only-memory (ROM) is derived from a gate array in which both P-channel transistor (24) and an N-channel transistor (30) are used to convey a logic 1 or 0 to a bitline (Bitline0). The invention maximizes the use of gate array transistors in a gate-array chip and achieves a high density of ROM bits per unit area. In CMOS gate arrays, transistors are arrayed in alternating rows of P-channel and N-channel transistors. A decoding scheme inverts the logic signal to each row of P-channel transistors to yield a functional ROM.

REFERENCES:
patent: 4773047 (1988-09-01), Uchino et al.
patent: 4873670 (1989-10-01), Tanaka et al.
patent: 4899308 (1990-02-01), Khan
patent: 5117389 (1992-05-01), Yiu
patent: 5319593 (1994-06-01), Wolstenholme

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