Static random access memory SRAM having weak write test circuit

Details Static random access memory SRAM having weak write test circuit Static random access memory SRAM having weak write test circuit

1995-09-15

1996-09-24

Nelms, David C.

Static information storage and retrieval

Read/write circuit

Testing

365203, 365204, 365205, 371 211, G11C 700, G11C 2900

Patent

active

055597459

ABSTRACT:
A test circuit and method for testing a memory cell in a static random access memory. The memory cell is coupled to a bit line and a complementary bit line. The test circuit includes a charging device coupled to selectively charge one of the bit line or the complementary bit line and a discharging device coupled to selectively discharge the other of the bit line and the complementary bit line. To test a memory cell containing the first value, the test circuit performs a weak write of the second value to the memory cell. The weak write overwrites the first value contained in the memory cell with the second value if the memory cell is defective. The memory cell retains the first value if functioning properly.

REFERENCES:
patent: 4956819 (1990-09-01), Hoffmann et al.
patent: 4958324 (1990-09-01), Devin
patent: 4999813 (1991-03-01), Ohtsuka et al.
patent: 5255230 (1993-10-01), Chan et al.

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