Static random access memory including potential control means fo

Details Static random access memory including potential control means fo Static random access memory including potential control means fo

1997-12-22

2000-01-04

Nelms, David

Static information storage and retrieval

Systems using particular element

Flip-flop

365154, 365227, G11C 1100

Patent

active

060117133

ABSTRACT:
A semiconductor memory includes a memory cell including inverters (IN1, IN2), control transistors (T3, T4) that control the potential of a ground side terminal (N3) connected to the memory cell, and transfer transistors T1 and T2 that control transfer of data from bit lines (BL, /BL) to the memory cell. In writing data, the control transistors raise the potential of the ground side terminal (N3) to be higher than the ground potential by a predetermined potential. After the transfer transistors transfer data having a potential difference smaller than a potential difference between the power supply potential and the ground potential from the bit lines (BL, /BL) to the memory cell, and cause the memory cell to hold the data, the potential of the ground side terminal (N3) is decreased to the ground potential to write data. Since data written in the memory cell suffices to have a potential difference smaller than the potential difference between the power supply potential and the ground potential, the time required to drive the bit line having a large load capacitance is shortened, the power consumption is decreased, and the power consumption necessary for writing data in the memory cell is reduced.

REFERENCES:
patent: 5278459 (1994-01-01), Matsui et al.
patent: 5581500 (1996-12-01), D'Souza
patent: 5621693 (1997-04-01), Nakase
patent: 5668770 (1997-09-01), Itoh et al.
patent: 5715191 (1998-02-01), Yamauchi et al.

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