Active solid-state devices (e.g. – transistors – solid-state diode – Fet configuration adapted for use as static memory cell
Patent
1996-12-19
1998-09-29
Whitehead, Jr., Carl W.
Active solid-state devices (e.g., transistors, solid-state diode
Fet configuration adapted for use as static memory cell
257206, 257328, 257330, 257334, 257374, 257393, 257397, 257401, 257513, 257904, H01L 2711, H01L 2994
Patent
active
058148957
ABSTRACT:
In a static random access memory (SRAM), a memory cell ratio is increased without deteriorating an integration degree of this SRAM. The static random access memory is arranged by: trenches formed in a semiconductor substrate and an insulating layer for isolating elements within a memory cell forming region; one pair of word transistors; one pair of driver transistors for constituting a flip-flop by forming channel regions of the driver transistors in side surfaces of the trenches and by cross-connecting gate electrodes thereof and drain electrodes thereof at one pair of input/output terminals of the flip-flop; and one pair of word transistors connected between the one pair of input/output terminals of the flip-flop and a bit line.
REFERENCES:
patent: 4839863 (1989-06-01), Soneda
patent: 4910712 (1990-03-01), Camarota et al.
patent: 4927777 (1990-05-01), Hsu et al.
patent: 5285093 (1994-02-01), Lage et al.
patent: 5307142 (1994-04-01), Corbett et al.
patent: 5324973 (1994-06-01), Sivan
Sony Corporation
Tang Alice W.
Whitehead Jr. Carl W.
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