Static random access memory having Bi-CMOS construction

Details Static random access memory having Bi-CMOS construction Static random access memory having Bi-CMOS construction

1987-08-14

1989-06-13

Moffitt, James W.

Static information storage and retrieval

Systems using particular element

Flip-flop

365177, 365208, G11C 702, G11C 1140

Patent

active

048398624

ABSTRACT:
A semiconductor memory of a Bi-CMOS construction is disclosed. The memory includes a plurality of cell blocks connected in common to a pair of main-bit lines. Each of the cell blocks includes a plurality of word lines, a pair of pre-bit lines, a plurality of memory cell each connected to one of the word lines and to the pre-bit lines, and a pair of bipolar transistors having the respective bases connected to the pre-bit lines and the respective collector-emitter current paths connected in series between the main-bit lines. One of the bipolar transistors is turned ON in response to data stored in a selected memory cell to discharge the associated main-bit line. The discharging of the pre-bit line and the main-bit line is thus carried out rapidly to increase data read operation speed.

REFERENCES:
patent: 4658159 (1987-04-01), Miyamoto
Nikkei Electronics 1986, 3, 10, pp. 199-217.

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