Static information storage and retrieval – Read/write circuit – Erase
Patent
1988-11-15
1990-08-14
Hecker, Stuart N.
Static information storage and retrieval
Read/write circuit
Erase
36523003, 365194, 365227, G11C 700
Patent
active
049493086
ABSTRACT:
The invention provides a static random access memory wherein the peak value of current flow therethrough upon flash-clearing is minimized. The static random access memory comprises a memory cell array which is divided into a plurality of memory cell groups which are driven at mutually different timings for flash-clearing by means of a plurality of delay circuits connected in cascade to which the flash-clearing signal is applied.
REFERENCES:
patent: 4774691 (1988-09-01), Hidaya
patent: 4789967 (1988-12-01), Liou et al.
patent: 4813021 (1989-03-01), Kai et al.
Wada, T. et al, "A 34-ns 1-Mbit CMOS SRAM Using Triple Polysilicon", IEEE Journal of Solid-State Circuits, SC-22:5 (10/87), pp. 727-732.
Araki Shigeo
Komatsu Takaaki
Suzuki Hiroyuki
Taniguchi Hitoshi
Garcia Alfonso
Hecker Stuart N.
Shaw, Jr. Philip M.
Sony Corporation
LandOfFree
Static random access memory having a flash clear function does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Static random access memory having a flash clear function, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Static random access memory having a flash clear function will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-467995