Static random access memory device with voltage control circuit

Details Static random access memory device with voltage control circuit Static random access memory device with voltage control circuit

1988-12-30

1990-10-16

Moffitt, James W.

Static information storage and retrieval

Powering

365228, 365205, 3072968, G11C 1140

Patent

active

049640844

ABSTRACT:
SRAM device having a power supply voltage control circuit capable of preventing the failure of memory cells used for a long period of time, without lowering a power supply voltage is disclosed. The SRAM device includes a plurality of word lines, a plurality of pairs of bit lines, a plurality of memory cells each coupled between a word line and each pair of bit lines, and a power supply regulating stage coupled to each memory cell, for decreasing a supply voltage delivered to each memory cell when an external power supply voltage exceeds a specified voltage level, and delivering the external power supply voltage to each memory cell when the external power supply voltage does not exceed the specified voltage level. If an external power supply voltage is lower than a voltage level Vc, the supply voltage is supplied as a power source of the memory cell. However, when the external power supply voltage exceeds the voltage level Vc, there is supplied a voltage of common power supply line lower than the power supply voltage by a threshold voltage of a MOS transistor.

REFERENCES:
patent: 4581545 (1986-04-01), Beale et al.
patent: 4585955 (1986-04-01), Uchida
patent: 4642488 (1987-02-01), Parker
patent: 4658156 (1987-04-01), Hashimoto
patent: 4694199 (1987-09-01), Goetz
patent: 4769784 (1988-09-01), Doluca et al.
patent: 4771407 (1988-09-01), Takemae et al.
patent: 4839577 (1989-06-01), Gardner

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