Static random access memory device with burn-in test circuit

Details Static random access memory device with burn-in test circuit Static random access memory device with burn-in test circuit

1998-02-05

1999-09-21

Nelms, David

Static information storage and retrieval

Read/write circuit

Testing

36518509, 365190, 365203, G11C 700

Patent

active

059562790

ABSTRACT:
A static random access memory (SRAM) device comprises an array of memory cells, a plurality of bit line precharge circuit for selectively delivering current to bit lines in response to a pair of control signals, during normal and burn-in test modes, and a burn-in current source circuit for selectively delivering current to the memory cells selected by the word lines along with the precharge circuit, in response to the control signals, during the burn-in test mode. In burn-in write operation, memory cells can be supplied with enough cell current without large increasing of chip size and power consumption in normal operation mode.

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patent: 5815511 (1998-09-01), Yamamato
patent: 5877976 (1999-03-01), Lattimore et al.

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