Static random access memory device having reset controller

Static information storage and retrieval – Systems using particular element – Flip-flop

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365195, 36523003, 365218, 365190, G11C 700

Patent

active

054503531

ABSTRACT:
A static random access memory device is equipped with a reset controller capable of performing a reset operation at high speed and with a reduced circuit configuration. The device has a memory cell including first and second data holding nodes and selectively connected to an associated bit line. The memory cell is equipped with a logic device for supplying a first voltage in common to the first and second holding nodes and, in response to a reset mode signal, supplying the first voltage to the first holding node and a second voltage being different from the first voltage to the second holding node. In this reset operation, a word decoder and word driver circuit is deactivated and inhibited from selecting and driving any word line.

REFERENCES:
patent: 4858182 (1989-08-01), Pang et al.
patent: 4890263 (1989-12-01), Little
patent: 5267210 (1993-11-01), McClure et al.

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