Static information storage and retrieval – Read/write circuit – Including signal clamping
Reexamination Certificate
2005-09-28
2011-11-22
Lappas, Jason (Department: 2827)
Static information storage and retrieval
Read/write circuit
Including signal clamping
C365S203000
Reexamination Certificate
active
08064271
ABSTRACT:
A static random-access memory (SRAM) and a method of controlling bit line voltage. In one embodiment, the SRAM includes: (1) an array of SRAM cells organized in rows and columns, (2) bit lines associated with the columns, (3) a high voltage power supply configured to supply a high supply voltage, (4) a low voltage power supply configured to supply a low supply voltage, (5) bit line precharge circuitry configured to precharge at least one of the bit lines to a first voltage and (6) standby circuitry configured to maintain a voltage of the at least one bit line at least a second voltage, the second voltage being lower than the first voltage and higher than the low supply voltage.
REFERENCES:
patent: 4852064 (1989-07-01), Kim et al.
patent: 5548560 (1996-08-01), Stephens et al.
patent: 6141259 (2000-10-01), Scott et al.
Brady III Wade J.
Keagy Rose Alyssa
Lappas Jason
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
LandOfFree
Static random access memory device having bit line voltage... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Static random access memory device having bit line voltage..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Static random access memory device having bit line voltage... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4310177