Static random access memory cell structure having a thin film tr

Static information storage and retrieval – Systems using particular element – Flip-flop

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365154, 257903, G11C 1140

Patent

active

054043263

ABSTRACT:
A semiconductor memory apparatus comprises a flip-flop circuit formed of a pair of inverters formed of driver transistors formed on a semiconductor substrate and having an input and an output coupled to each other in a crossing fashion, and transistors formed on a semiconductor thin film formed on the semiconductor substrate, and a pair of access transistors coupled to drain electrodes of the inverters constructing the flip-flop circuit. In this semiconductor memory apparatus, a coupling capacitance is formed on an overlapping portion in which active layers of the semiconductor thin film transistors and gate electrodes of the semiconductor thin film transistors are overlapped to each other and a part of the overlapping portion in which the coupling capacitance is formed is formed within a contact hole, thereby forming a coupling capacitance between the gate electrode and the drain electrode of the inverters. A soft error, caused by an .alpha.-particle or the like, can be prevented by this coupling capacitance. Furthermore, at least an impurity concentration of the drain region of the semiconductor thin film transistor at its portion in which the coupling capacitance is formed is selected to be lower than that of the source region of the semiconductor thin film transistor. Thus, a standby current can be suppressed by suppressing an off-state current of the semiconductor thin film transistor.

REFERENCES:
patent: 4841481 (1989-06-01), Ikeda
patent: 4894801 (1990-01-01), Saito
patent: 5018102 (1991-05-01), Houston
patent: 5034797 (1991-07-01), Yamanaka
patent: 5132771 (1992-07-01), Yamanaka
patent: 5134581 (1992-07-01), Ishibashi
patent: 5157474 (1992-10-01), Ochii
patent: 5267192 (1993-11-01), Nogami

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