Static random access memory cell

Details Static random access memory cell Static random access memory cell

2008-01-22

2008-01-22

Phung, Anh (Department: 2824)

Static information storage and retrieval

Systems using particular element

Flip-flop

C365S185070

Reexamination Certificate

active

07321504

ABSTRACT:
A static random access memory (SRAM) cell having an inverter and a tri-state inverter. An input of the inverter is coupled to an output of the tri-state inverter and an output of the inverter is coupled to an input of the tri-state inverter. The tri-state inverter has an enable node to which a read signal is applied and is configured to generate an output signal that is the complement of an input signal in response to an active read signal. The SRAM cell further includes an access transistor having a first node coupled to the output of the tri-state inverter and having a second node coupled to the digit line. The access transistor is configured to couple the first and second nodes in response to an active access signal applied to its gate.

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