Static-random-access-memory cell

Details Static-random-access-memory cell Static-random-access-memory cell

1999-08-24

2000-03-28

Le, Vu A.

Static information storage and retrieval

Systems using particular element

Flip-flop

365156, 257903, 257904, 257351, G11C 700

Patent

active

060440112

ABSTRACT:
A 4-T SRAM cell includes access transistors of a first type and cell (pull-up or pull-down) transistors of a second type. For example, the cell includes PMOS access transistors and NMOS pull-down transistors. The cell may also include leaky-junction or Schottky loads.

REFERENCES:
patent: 4796227 (1989-01-01), Lyon et al.
patent: 5963469 (1999-10-01), Forbes
Lyon, Richard F. and Schediwy, Richard R., "CMOS Static Memory with a New Four-Transistor Memory Cell", Advanced Resarch I VLSI, Proceedings of the 1987 Stanford Conference, pp. 110-132.
Matsui, K. et al., 1.9.mu.m.sup.2 Loadless CMOS Four-Transistor SRAM Cell in a 0.18-.mu.m Logic Technology, 1998 IEEE, pp. 22.8.1-22.8.4.

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