Static information storage and retrieval – Addressing – Multiple port access
Patent
1992-06-04
1995-06-13
Popek, Joseph A.
Static information storage and retrieval
Addressing
Multiple port access
365154, 365156, 365190, G11C 800
Patent
active
054249953
ABSTRACT:
A plurality of first word lines are connected to a first word selector, and a plurality of second word lines are connected to a second word selector. A plurality of first bit lines are connected to a first bit selector, and a plurality of second bit lines are connected to a second bit selector. Each memory cell includes two inverters and first and second access gates. Each memory cell is connected to the first word line, the second word line, the first bit line and the second bit line. In data writing, data is written to a node through the first access gate. In data reading, data at the node or node is read through either the first or the second access gate.
REFERENCES:
patent: 4536859 (1985-08-01), Kamuro
patent: 4541076 (1985-09-01), Bowers et al.
patent: 4571703 (1986-02-01), Noda
patent: 4825098 (1989-04-01), Aoyama
patent: 5289432 (1994-02-01), Dhong et al.
Miyazaki Yukio
Okitaka Takenori
Le Vu
Mitsubishi Denki & Kabushiki Kaisha
Popek Joseph A.
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