Static random access memory

Details Static random access memory Static random access memory

2006-06-06

2006-06-06

Tran, Mai-Huong (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Fet configuration adapted for use as static memory cell

C257S216000, C257S220000, C257S222000, C257S239000, C257SE27150, C257SE29231

Reexamination Certificate

active

07057302

ABSTRACT:
A static random access memory has first and second complementary field-effect transistors. The first complementary field-effect transistor includes a semiconductor substrate, a first field-effect transistor of electron conduction type which has a first drain region constituting a Schottky junction and a gate electrode, and a first field-effect transistor of positive hole conduction type which shares the first drain region and has a shared gate electrode. The second complementary field-effect transistor includes a second field-effect transistor of electron conduction type which has a second drain region and a gate electrode, a second field-effect transistor of positive hole conduction type which shares the second drain region and has a shared gate electrode. The gate electrode shared by the first and second complementary field-effect transistors is connected to the common drain region of the mutually opposing complementary field-effect transistors, and the static random access memory has superior resistance to software errors.

REFERENCES:
patent: 5223725 (1993-06-01), Miwada
patent: 3378512 (2002-12-01), None
K. Matsuzawa et al., “Device Simulation and Measurement of Hybrid SBTT,”Simulation of Semiconductor Processes and Devices 2001—SISPAD 01, Pub. by SpringerWien, NY, D. Tsoukalas et al., eds., pp. 380-383 (2001).

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