Static random access memory

Details Static random access memory Static random access memory

2005-03-01

2005-03-01

Le, Thong Q. (Department: 2818)

Static information storage and retrieval

Systems using particular element

Flip-flop

C365S230060, C365S185160

Reexamination Certificate

active

06862207

ABSTRACT:
A method and apparatus for a four transistor SRAM comprising an array or block of cells. Each cell comprises a pair of pass transistors and a pair of pull-down transistors. In one embodiment of the invention, when the SRAM block is in a standby mode, the difference between the voltage at the gate and the voltage at the source of each pass transistor is greater than 0, and less than the threshold voltage of the pass transistor. In one embodiment of the invention a ground connection of the memory cell is switched such that when the SRAM block is in the standby mode, the ground connection is a virtual ground connection and when the SRAM block is in an active mode the ground connection is a global ground connection.

REFERENCES:
patent: 5898610 (1999-04-01), Greason
patent: 5946264 (1999-08-01), McClure
patent: 6044011 (2000-03-01), Marr et al.
patent: 6259623 (2001-07-01), Takahashi
patent: 6330195 (2001-12-01), Marr

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