Static information storage and retrieval – Read/write circuit – Testing
Patent
1991-03-28
1995-06-27
Clawson, Jr., Joseph E.
Static information storage and retrieval
Read/write circuit
Testing
365174, 365208, 365203, 365156, G11C 706
Patent
active
054285747
ABSTRACT:
A static RAM includes test features which provide for the detection of soft defects which may cause a defective SRAM cell to behave as a functional DRAM cell. Provision is made for writing either a high or a low logic state to each bit line of the SRAM while not writing any value to its complementary bit line and for sensing the state of each bit line independently of the state of its complementary bit line. In addition, a current test is provided which detects soft defects by means of the increased inverter leakage current caused thereby. It is possible, by properly combining these tests, to reliably detect all soft defects, thereby assuring the data retention capability of the SRAM. This technique avoids the long hold time and/or high temperature test techniques used in the prior art.
REFERENCES:
patent: 4685086 (1987-08-01), Tran
patent: 4730275 (1988-03-01), Baskett
patent: 4783764 (1988-11-01), Tsuchiya et al.
patent: 4835458 (1989-05-01), Kim
patent: 5034923 (1991-07-01), Kuo et al.
Carter Ernest A.
Kuo Clinton C. K.
Clawson Jr. Joseph E.
Meyer Jonathon P.
Motorola Inc.
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