Static RAM cell

Static information storage and retrieval – Systems using particular element – Semiconductive

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365175, 307290, 307317A, G11C 1140

Patent

active

041047320

ABSTRACT:
A static RAM cell, including two vertical, multiple-Schottky-collector switching transistors wherein a first collector of each is coupled to first and second sources of read/write data, respectively, and wherein a second collector of each transistor is cross-coupled with the base of the other transistor. The cell is implemented with I.sup.2 L technology, and also includes a complementary inverted multiple-collector NPN load transistor having its base electrically common with the emitters of the switching transistors, a first collector merged with the base of one switching transistor, and a second collector merged with the base of the other switching transistor.

REFERENCES:
patent: 3427598 (1969-02-01), Kubinec
IBM Tech. Dis. Bull., vol. 15, No. 1, Jun. 1972, p. 260, "Double Emitter-Bit Line Schottky Memory Cell", by Siplatt.

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