Static RAM and processing apparatus including static RAM

Static information storage and retrieval – Read/write circuit – Differential sensing

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Details

365208, 36518905, 36518911, G11C 702

Patent

active

055597475

ABSTRACT:
A static RAM is disclosed wherein a combination logic circuit can operate at a higher speed to improve the throughput and the load such as the number of gates and/or wiring lines connected to a data output line can be reduced. The static RAM comprises a RAM cell for storing data, a differential amplifier for amplifying a signal read out from the RAM cell, a level keeping circuit for keeping a level of a signal outputted from the differential amplifier, a first output line for outputting an output signal of a kept level from the level keeping circuit upon reading accessing to the static RAM as a static output, and a second output line for outputting a state of at least one of a positive phase bit line and an inverted phase bit line of the differential amplifier upon reading accessing to the static RAM as a dynamic output. The static RAM can be suitably used with an associative storage circuit represented by a tag RAM circuit of a cache memory system and like storage circuits.

REFERENCES:
patent: 5394361 (1995-02-01), Dickinson

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