Static RAM

Static information storage and retrieval – Read/write circuit – Including reference or bias voltage generator

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Details

36518907, 36518911, G11C 700

Patent

active

058417044

ABSTRACT:
An SRAM using Schottky gate FETs and immune to variations in the process parameters or a change in temperature, and which does not permit the voltage amplitude of the bit lines to be changed by variations in the process parameters or by a change in temperature. This is accomplished by providing a bit line pull-up circuit 100 which is so constituted that a voltage difference between the reference voltages Vref1 and Vref2 that do not change depending upon the temperature is reflected on the voltage amplitude of the bit lines BL, BL during the reading operation.

REFERENCES:
patent: 4799193 (1989-01-01), Horiguchi et al.
patent: 4875195 (1989-10-01), Momodomi et al.
patent: 5050127 (1991-09-01), Mitsumoto et al.
patent: 5253201 (1993-10-01), Atsumi et al.
patent: 5307315 (1994-04-01), Oowaki et al.
IEEE International Solid State Circuits Conference, vol. 34, Feb. 1991, Suzuki et al.

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