Static pulsed cross-coupled level shifter and method therefor

Electronic digital logic circuitry – Interface – Supply voltage level shifting

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326 68, H03K 19094

Patent

active

058960457

ABSTRACT:
Level shifting circuit (36) utilizes self-timed pulse generators (40, 46) to provide a series of pulses in response to an input signal. The pulses are used to create a pulse of specified duration at a predetermined voltage level at first and second nodes (44, 45). In response to the predetermined pulses, shifted inverters (50, 52) provide a voltage output of either V.sub.DDH or V.sub.DDL, one of two different voltages which exist in a system utilizing the level shifter (36). In one form, level shifting circuit (36) may be used in an output buffer (60) to interface an integrated circuit designed to operate at a low supply voltage with additional integrated circuits operating at a higher supply voltage which could damage the gate oxide of the transistors in the low supply voltage integrated circuit.

REFERENCES:
patent: 4797838 (1989-01-01), Nelson et al.
patent: 5216300 (1993-06-01), Wabuka
patent: 5266849 (1993-11-01), Kitahara

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