Static memory long write test

Details Static memory long write test Static memory long write test

1993-12-22

1996-11-19

Beausoliel, Jr., Robert W.

Excavating

365201, G11C 2900

Patent

active

055770517

ABSTRACT:
According to the present invention, after a test data pattern has been written to selected static memory cells, the wordlines of the memory cells are turned off and the bitline true and bitline complement of the memory cells are simultaneously pulled to a predetermined logic level for the duration of the long write test so that the memory cells are disturbed. After the long write test, the contents of the memory cells are read to determine which memory cells contain corrupted data and therefore have bitline to memory cell leakage problems.

REFERENCES:
patent: 4460978 (1984-07-01), Jiang et al.
patent: 5051948 (1991-09-01), Watabe et al.
patent: 5255230 (1993-10-01), Chan et al.
patent: 5289475 (1994-02-01), Slemmer
patent: 5329175 (1994-07-01), Peterson
patent: 5347483 (1994-09-01), Torimaru

Affiliated with

Also associated with

Rating

Static memory long write test does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Static memory long write test, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Static memory long write test will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-546766