Static memory cell with a pair of transfer MOS transistors, a pa

Details Static memory cell with a pair of transfer MOS transistors, a pa Static memory cell with a pair of transfer MOS transistors, a pa

1998-05-29

2000-06-06

Hoang, Huan

Static information storage and retrieval

Systems using particular element

Flip-flop

365156, 257903, G11C 1100

Patent

active

060727144

ABSTRACT:
A first driver MOS transistor and a second driver MOS transistor are formed at the surface of a semiconductor substrate. A first load element is connected to the drain region of the first driver MOS transistor and the gate electrode of the second driver MOS transistor. A second load element is connected to the drain region of the second driver MOS transistor and the gate electrode of the first driver MOS transistor. A first transfer MOS transistor is formed at the surface, one of the source and drain regions of which is connected to the drain region of the first driver MOS transistor. Further, a second transfer MOS transistor is formed at the surface, one of the source and drain regions of which is connected to the drain region of the second driver MOS transistor. An inter-layer insulation film is formed on the first driver MOS transistor, the second driver MOS transistor, the first transfer MOS transistor and the second transfer MOS transistor. A word line, a first bit line and a second bit line is formed on the inter-layer insulation film. The Word line is connected to the gate electrode of the first transfer MOS transistor and the gate electrode of the second transfer MOS transistor. The first bit line is connected to the other of the source and drain regions of the first transfer MOS transistor. The second bit line is connected to the other of the source and drain regions of the second transfer MOS transistor.

REFERENCES:
patent: 5225693 (1993-07-01), Hirayama
patent: 5241495 (1993-08-01), Sasaki
patent: 5436506 (1995-07-01), Kim et al.

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